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Device tree pinctrl 32-bit or 16-bit?

Question asked by David Luberger on Sep 20, 2018
Latest reply on Sep 21, 2018 by igorpadykov

I'm confused about the iomux settings on some pads. I've noticed that sometimes, there will be a bit set in the upper word of the pad setting.  What exactly is the hex value next to the pad designation controlling? I'm finding a lot of conflicting information.

For example:

&iomuxc {      pinctrl-names = "default";      pinctrl-0 = <&pinctrl_hog>;

      pinctrl_i2c1: i2c1grp {    fsl,pins = < MX6UL_PAD_UART4_TX_DATA__I2C1_SCL 0x4001b8b0 MX6UL_PAD_UART4_RX_DATA__I2C1_SDA 0x4001b8b0    >;
      };
};

This shows a 32-bit number, but when I look in the reference manual for either pad setting under iomuxc, for example section 30.5.41, it shows all but the lower 5 bits as reserved.  Is that not what the value for the fsl,pins array is used for?  I thought maybe it was related to the config bits definition in fsl,imx6ul-pinctrl.txt, but that list only seems to show valid settings in the lower 17 bits.  But in the example above, and in many other pinctrl settings, there are sometimes bits set in positions 30 and 31.  What am I missing?

 

I'm having problems with my I2C bus (both of them) where u-boot probe shows no addresses appearing.  I'm using the evk device tree settings for these pads, but since I can't make heads or tails of the pinctrl setting number (0x4001b8b0, in particular, the leading "4") since my understanding is that the pinctrl number should be at most 17 bits, I can't tell if it's the device tree setting causing the problem (though I realize the device tree doesn't affect u-boot).

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