LPC43S30 SPIFI1 Bug

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LPC43S30 SPIFI1 Bug

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tobiasmeyer
Contributor I

Hello,

we have a behavior similar to error LPC 43xx SPIFI.1 on a 43S30 Revision D device.

It occurs at cold start though.

The device is bootstrapped to boot from external flash via SPIFI.

After applying power the device is held in reset for 300ms by an external supply monitor.

When the reset is released there is no activity on any of the SPIFI pins, means no SPIFI boot attempt at all.

The device will then start to toggle P1_1 with 1 Hz for 1 minute and then happily and reliably boot from external flash to work stable until the next power cycle.

We have a batch of devices that either always boot correctly or always have the one minute delay which is not acceptable for the application. All those are revision D and on identical boards.

SPIFI.1 is not mentioned in the 43Sxx errata at all. Is it present and on what revisions?

SPIFI.1 is not supposed to occur at cold start. Can it occur on cold start as well?

Please see the attached screenshot.

Vcc yellow: analog

SPIFI_CLK: D0

SPIFI_MISO: D1

BOOT_SRC0: D2

/Reset: D3

Any suggestions for workarounds welcome!

Regards,

Tobias

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soledad
NXP Employee
NXP Employee

Hi,

The SPIFI.1 errata applies only for below devices:

LPC4370FET100; LPC4370FET256; LPC4350FET256; LPC4350FET180; LPC4330FET256; LPC4330FET180; LPC4330FET100; LPC4330FBD144; LPC4320FET100; LPC4320FBD144; LPC4310FET100; LPC4310FBD144; Cortex-M4 flashless; Rev A.

No for the LPC43S30 Revision D device.

Which flash are you using?

Could you please try the suggestions from next links:

SPIFI boot issue 

SPIFI Errata and Part Version Information 


Have a great day,
TIC

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tobiasmeyer
Contributor I

Hi,

we are using S25FL132K flash. However, I don't see how the flash type could possibly make a difference as not a single clock pulse is output by the LPC SPIFI?

Our problem seems to differ from those treated in both suggested links.

In https://community.nxp.com/thread/420724 LPCware posts:

"One reason for a cold boot fail is of course the SPIFI problem mentioned in the error sheet, where it fails with the first reset but works with the second reset. At power-up it works in the first step. It also works with one reset and then wait for 60 seconds, then the bootloader runs into a timeout and initiates a core reset (= second reset)."

This seems to be exactly our problem but on a 4330, not on a 43S30 revision D device?

Regards,

Tobias

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