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LPC43S30 SPIFI1 Bug

Question asked by Tobias Meyer on Sep 18, 2018
Latest reply on Sep 21, 2018 by Tobias Meyer

Hello,

we have a behavior similar to error LPC 43xx SPIFI.1 on a 43S30 Revision D device.

It occurs at cold start though.

The device is bootstrapped to boot from external flash via SPIFI.

After applying power the device is held in reset for 300ms by an external supply monitor.

When the reset is released there is no activity on any of the SPIFI pins, means no SPIFI boot attempt at all.

The device will then start to toggle P1_1 with 1 Hz for 1 minute and then happily and reliably boot from external flash to work stable until the next power cycle.

We have a batch of devices that either always boot correctly or always have the one minute delay which is not acceptable for the application. All those are revision D and on identical boards.

SPIFI.1 is not mentioned in the 43Sxx errata at all. Is it present and on what revisions?

SPIFI.1 is not supposed to occur at cold start. Can it occur on cold start as well?

 

Please see the attached screenshot.

Vcc yellow: analog

SPIFI_CLK: D0

SPIFI_MISO: D1

BOOT_SRC0: D2

/Reset: D3

 

Any suggestions for workarounds welcome!

 

Regards,

Tobias

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