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[S32K146] SPI and Chip Select management

Question asked by Sebastien Le Diouris on Sep 17, 2018
Latest reply on Sep 27, 2018 by Razvan-nicolae Tilimpea

Hello the community,

 

I am working on NXP S32K146 µc and S32DS IDE.

 

I have an issue on SPI with chip select management. The µc is configured in master, and it communicates with 2 slaves on CS0 and CS3.

Firstly, the µc communicate on CS0 --> OK

Secondly, the µc communicate on CS3 --> OK

But if :

Firstly, the µc communicate on CS3 --> OK

Secondly, the µc communicate on CS0 --> NOK

 

I check the register TCR (bits PCS) when I active both CSx and everything is ok. But when I have checked on scope, I saw, as soon as CS3 is selected, the pin CS3 stays activated and never CS0.

 

My question is, what I have to do when I want to change the CS, the register TCR (PCS) is not enought ? (Of course the CS is not changed during transfert)

 

Thanks by advance

 

Sebastien

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