[S32K146] SPI and Chip Select management

[sebastien_ledio]

Hello the community,

I am working on NXP S32K146 µc and S32DS IDE.

I have an issue on SPI with chip select management. The µc is configured in master, and it communicates with 2 slaves on CS0 and CS3.

Firstly, the µc communicate on CS0 --> OK

Secondly, the µc communicate on CS3 --> OK

But if :

Firstly, the µc communicate on CS3 --> OK

Secondly, the µc communicate on CS0 --> NOK

I check the register TCR (bits PCS) when I active both CSx and everything is ok. But when I have checked on scope, I saw, as soon as CS3 is selected, the pin CS3 stays activated and never CS0.

My question is, what I have to do when I want to change the CS, the register TCR (PCS) is not enought ? (Of course the CS is not changed during transfert)

Thanks by advance

Sebastien

[sebastien_ledio]

Hello Daniel,

thanks for your answers I did not see the TCR register is usable only in stop mode.

So what is the process (the code source) to change chip select ?

Because I am a little lost.

Regards

Sebastien

[razva_tilimpea]

Hi Sebastien,

I recommend the following procedure:

LPSPI0->TCR = LPSPI_TCR_CPHA_MASK | LPSPI_TCR_CPOL_MASK | LPSPI_TCR_PRESCALE(1) | LPSPI_TCR_FRAMESZ(15);

//Send data with  PCS 0;

LPSPI0->TCR = LPSPI_TCR_CPHA_MASK | LPSPI_TCR_CPOL_MASK | LPSPI_TCR_PRESCALE(1) | LPSPI_TCR_FRAMESZ(15) | LPSPI_TCR_PCS(3);

//Send data with  PCS 3;

LPSPI0->TCR = LPSPI_TCR_CPHA_MASK | LPSPI_TCR_CPOL_MASK | LPSPI_TCR_PRESCALE(1) | LPSPI_TCR_FRAMESZ(15);

//Send data with  PCS 0;

The main point is to use only one write operation to handle TCR. If you do something like this: clear PCS and then set PCS in TCF fifo are 2 elements and first frame sent will use PCS0 (configured by clear operation) and the second frame will use the PCS configured by your application.

Best regards,

Razvan

[sebastien_ledio]

In fact my solution seems not fully right.

I do not know the correct thing to manage the Chip Select changing, if someone can help me

[danielmartynek]

Hi Sebastien,
The TCR register is not an ordinary register, it is a FIFO.
The read-modify-write operations that you are doing are not good in this case.
Section 49.3.1.15.2 S32K1xx RM rev.8 discusses problems of reading the register.
You can prepare the commands in variables/constants a then simply write them in the TCR register.
LPSPI0->TCR = command;

Regards,
Daniel

[sebastien_ledio]

Hello,

I answer myself, because I find a solution :

Before I had:

     /* Remove actual chip select */
    LPSPI0->TCR &= ~LPSPI_TCR_PCS_MASK;
    /* Write new chip select */
    LPSPI0->TCR |= LPSPI_TCR_PCS(u8ChipSelected);

Now I have:

    LPSPI0->TCR = LPSPI_TCR_CPHA_MASK
                | LPSPI_TCR_CPOL_MASK
                | LPSPI_TCR_PRESCALE(1)
                | LPSPI_TCR_FRAMESZ(15);
    LPSPI0->CR |= LPSPI_CR_MEN_MASK;
    /* Remove actual chip select */
    LPSPI0->TCR &= ~LPSPI_TCR_PCS_MASK;
    /* Write new chip select */
    LPSPI0->TCR |= LPSPI_TCR_PCS(u8ChipSelected);

Best regards

Sebastien