Got a problem with an external UART connected to XIRQ on a Freescale MC9S12A64 processor...
This interrupt is non-maskable; I cant change it or modify the hardware in any way due to legacy reasons. Also, the UART is connected via a couple of ports emulating an address and data bus. This makes UART register access a non-atomic operation consisting of a number of CPU instructions to set up the address \ data bits and port direction..
Foreground read\write "to the UART" is done by reading \ writing RAM based ring buffers. The XIRQ \ UART interrupt deals with read\ write from the RAM based ring buffers on the other side.
I have reduced the reasons for foreground access to the UART down to just enabling the UART Tx interrupt when data is waiting in a RAM based ring buffer. Unfortunately, this occasionally "collides" with the XIRQ interrupt routine requirement to transfer data between the UART and ring buffers, resulting in data corruption.
I know I cant mask the XIRQ - (I believe I cant even turn it off once turned on). However, if I could get the XIRQ routine to trigger and pick up a flag to indicate "enable UART Tx interrupt", then all hardware accesses would be through the one interrupt routine, removing the problem with non-atomic collision.
Question - is there a way to trigger the XIRQ interrupt routine to run (as an interrupt!) using a code-based \ software access?