Master SPI, always in interruption

[sebastien_ledio]

Hello,

before asking my question, some informations : I use S32DS, the µc is S32K146 and I use Segger probe in debug

I configure the SPI in master (I do not forget to set DBGEN to 1 because the SW runs in debug), but the problem is the code is always in LPSPI0 interruption (no other code is executed).

I saw in datasheet there is the register status SR where inside there are 2 bits (RDF & TDF, flag for receive and transmit data) but it is not possible to clear them because there are in read mode only.

So my question is, when the SW goes in interruption, the flag interruption is directly clear or, is it to the SW to clear it to avoid go always in interrup function ?

If I have to clear this flag interrup, where is it for LPSPI0 ?

Thanks by advance.

Sebastien

[danielmartynek]

Hello,

You should read the data from the Receive FIFO (Receive Data Register (RDR)) when RDF is set and write to the FIFO (Transmit Data Register (TDR)) when FDT is set. Because the flags only shows the state of the FIFO.

Regards,

Daniel