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Example MPC5748G SMPU initialization + Process ID test

Question asked by Christopher Holland on Sep 13, 2018
Latest reply on Sep 18, 2018 by Lukas Zadrapa

I have a few questions in regards to the MPC5748G SMPU. Example MPC5748G SMPU initialization + Process ID test 

 

1. Where is the referenced instruction __MSTPR exist?

I noticed an include file I am not familiar with #include <ppc_ghs.h>

 

 

2. In the example, is there a specific reason for switching to SMPU_1? Couldn't SMPU_0.RGD[6]  be used instead?

// Peripheral Address Space (256MB)
SMPU_0.RGD[5].WORD0.R = 0xf0000000; // start address
SMPU_0.RGD[5].WORD1.R = 0xffffffff; // end address
SMPU_0.RGD[5].WORD2.FMT0.R = 0xffc0fc00; // rw set for masters: M0, M1, M2, M3, M4, M8, M9, M10
SMPU_0.RGD[5].WORD3.B.CI = 1; // set cache inhibit
SMPU_0.RGD[5].WORD5.B.VLD = 1; // enable descriptor[7]

// SRAM used by all cores (768kB)
SMPU_1.RGD[0].WORD0.R = 0x40000000; // start address
SMPU_1.RGD[0].WORD1.R = 0x400bffff; // end address
SMPU_1.RGD[0].WORD2.FMT0.R = 0xc3ffff00; // rw set for masters: M0, M3, M4, M5, M6, M7, M8, M9, M10, M11, M12, M13
SMPU_1.RGD[0].WORD5.B.VLD = 1; // enable descriptor[0]

 

3. In the example, There seems to be several regions being given access, but are they not given all access rights by default? Why then would code enable it again?

// Enable all access rights for all masters regardless of PID
SMPU_1.RGD[0].WORD0.R = 0x40000000; // start address
SMPU_1.RGD[0].WORD1.R = 0x400befff; // end address
SMPU_1.RGD[0].WORD2.FMT0.R = 0xc3ffff00; // rw set for masters: M0, M3, M4, M5, M6, M7, M8, M9, M10, M11, M12, M13
SMPU_1.RGD[0].WORD5.B.VLD = 1; // enable descriptor[0]

 

 

Thank you,

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