reference manual says
Is the content of this register persistent? E.g. assuming two transfers where the first one has a bad CRC and the second one is ok. Will this register contain 7'b000_0000 (No error event) (from the 2nd xfer) or will it contain information about the error in the first transfer?
When content is persistent, how can I reset it?
When content is not persistent: how can I capture the information about bit errors?