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Ethernet on Custom Board doesn't work

Question asked by stimpy on Sep 5, 2018
Latest reply on Sep 21, 2018 by stimpy



We have designed a custom board with I.MX6 SoloX (MCIMX6X3EVO10AB). The whole board is very close to the eval board 6SX SABRE SDB (see relevant schematic_eth.png in attachment). The difference on our board is that only 100Mbps signals are used from RJ45 and 1Gbps Signals are not connected.

Linux of Yocto Rocko is running on it.

If the board is connected over ethernet the LED_ACT LED starts blinking. After about 15 seconds the LED_10_100 turns on and following messages are printed over serial console

fec 2188000.ethernet eth0: Link is Up - 10Mbps/Full - flow control off
IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready


When ethernet cable is unplugged, following messages appear:

fec 2188000.ethernet eth0: Link is Down
IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready

Following activity are measured on the pins:

ENET1_MDC (2.36MHz, 0..3.3V),

ENET1_MDIO (0.3..3V),

ENET2_RX_CLK (25MHz, 0..3.3V),



ENET2_CRS (3.3V)

RGMIII1_TD[0:2] (0..1.5V, some data every few seconds )

RGMIII1_TD[3] (0..1.5V, some data bit more frequent than RGMIII1_TD[0:2] )

RGMIII1_TX_CTL (0..1.5V, some data every few seconds )

RGMIII1_TXC (2.5MHz, 0..1.5V)

RGMIII1_RD[0:3] (0..1.5V), 

RGMIII1_RXC (25 MHz, 0...1.5V), 

RGMIII1_RX_CTL (0..1.5V), 


Suspicious things:

- TD seems to be on lower frequency than RX. This could be due to that the imx6 thinks it's 10Mbps and the PHY is on 100Mbps.


In the DeviceTree (see imx6sx-sdb.dtsi in attachment) there are following entries:

&iomuxc {
     pinctrl-names = "default";
     pinctrl-0 = <&pinctrl_hog &pinctrl_can_gpios>;

     imx6x-sdb {
          pinctrl_enet1: enet1grp {
               fsl,pins = <
                          MX6SX_PAD_ENET1_MDIO__ENET1_MDIO     0xa0b1
                    MX6SX_PAD_ENET1_MDC__ENET1_MDC          0xa0b1
                    MX6SX_PAD_RGMII1_TXC__ENET1_RGMII_TXC     0xa0b1
                    MX6SX_PAD_RGMII1_TD0__ENET1_TX_DATA_0     0xa0b1
                    MX6SX_PAD_RGMII1_TD1__ENET1_TX_DATA_1     0xa0b1
                    MX6SX_PAD_RGMII1_TD2__ENET1_TX_DATA_2     0xa0b1
                    MX6SX_PAD_RGMII1_TD3__ENET1_TX_DATA_3     0xa0b1
                    MX6SX_PAD_RGMII1_TX_CTL__ENET1_TX_EN     0xa0b1
                    MX6SX_PAD_RGMII1_RXC__ENET1_RX_CLK     0x3081
                    MX6SX_PAD_RGMII1_RD0__ENET1_RX_DATA_0     0x3081
                    MX6SX_PAD_RGMII1_RD1__ENET1_RX_DATA_1     0x3081
                    MX6SX_PAD_RGMII1_RD2__ENET1_RX_DATA_2     0x3081
                    MX6SX_PAD_RGMII1_RD3__ENET1_RX_DATA_3     0x3081
                    MX6SX_PAD_RGMII1_RX_CTL__ENET1_RX_EN     0x3081
                    MX6SX_PAD_ENET2_RX_CLK__ENET2_REF_CLK_25M     0x91
          pinctrl_enet_3v3: enet3v3grp {
               fsl,pins = <
                    MX6SX_PAD_ENET2_COL__GPIO2_IO_6      0x000010B0
                    MX6SX_PAD_ENET2_CRS__GPIO2_IO_7      0x000010B0
                    MX6SX_PAD_ENET2_TX_CLK__GPIO2_IO_9      0x000010B0
          pinctrl_enet2: enet2grp {


&fec1 {
     pinctrl-names = "default";
     pinctrl-0 = <&pinctrl_enet1>;
     phy-supply = <®_enet_3v3>;
     phy-mode = "rgmii";
     phy-handle = <ðphy1>;
     status = "okay";

     mdio {
          #address-cells = <1>;
          #size-cells = <0>;

          ethphy1: ethernet-phy@1 {
               reg = <1>;
          ethphy2: ethernet-phy@2 {
               reg = <2>;



Do you have any clue where to check next what to do?


Many thanks in advance for any tips.

Regards Dani