Do I undestand right :
- VBAT and SR addresses window spaces mapped to AIPSx bridge areas directly
- As result access to VBAT&SR can't be protected by MPU or AIPSx bridge settings
and it is possible to access to those spaces in User execution mode ( And Supervisor as well ) ?
- for enable access to VBAT & SR , bit29 ( RTC access control bit ) should be enabled in SIM_SCGC6 register ?
Looks like no any dependencies to RTC clock and line CLOCK_EnableClock(kCLOCK_Rtc0) is not mandatory