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Over-current protection by eTimer FAULT safing mode_ SPC570S50E1

Question asked by tran hung on Sep 2, 2018

Hello everyone!

 

I tried to configure eTimer_0 ETC_4 as a source FAULT_0 for eTimer 3. The PA[13] is assigned as an external input fault source. My configuration code is below:

 

void etimer_config ()

{

 

ETIMER_0.CH[4].CNTR.R = 1000;

ETIMER_0.CH[4].CTRL1.B.CNTMODE = 0x6U; /* Edge of secondary source triggers primary count till compare */

ETIMER_0.CH[4].CTRL1.B.PRISRC = 0x18U; /* primary count source = IP bus clock/2 */

ETIMER_0.CH[4].CTRL1.B.SECSRC = 0x4U; /* Counter #4 input pin etimer0.ch[4]/ PA[13] */

ETIMER_0.CH[4].CTRL1.B.ONCE = 0U; /* count repeatedly */

ETIMER_0.CH[4].CTRL1.B.LENGTH = 0U; /* count until rolling over */

ETIMER_0.CH[4].CTRL1.B.DIR = 0U; /* count up */

 

ETIMER_0.CH[4].CTRL2.B.OEN = 0U; /* output disable */

ETIMER_0.CH[4].CTRL2.B.RDNT = 0U; /* disable redundant channel */

ETIMER_0.CH[4].CTRL2.B.INPUT = 0x1U;  /* External input signal enable*/

ETIMER_0.CH[4].CTRL2.B.SIPS = 0x1; /* Positive edge for recounting*/

 

ETIMER_0.CH[4].CTRL3.B.FMODE = 1;   /* change mode */

ETIMER_0.CH[4].CTRL3.B.FDIS = 1; /* The channel OFLAG output is affected by this FAULT pin. */

 

ETIMER_0.CH[4].FILT.B.FILT_CNT = 7; /* sample filter counter*/

ETIMER_0.CH[4].FILT.B.FILT_PER = 255; /* input filter period */

 

 

ETIMER_0.CH[4].CCCTRL.B.CPT2MODE = 0x2U;  /*Capture 2 Mode Control*/

ETIMER_0.CH[4].CCCTRL.B.CPT1MODE = 0x2U;  /*Capture 1 Mode Control*/

ETIMER_0.CH[4].CCCTRL.B.CFWM = 0x1U;  /*FIFO = 2*/

}

 

void FAULT_PIN_Configure ()

{

    SIUL2.MSCR_MUX[206].R = 0x1U;

}

When this program operates, the PWM of eTimer_3 already disable, but it cannot enable when the fault pin PA[13] change the state. Can you review my configuration?

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