MCF5223x Flash programming - confusing

Discussion created by MrBean on Nov 27, 2008
Latest reply on Dec 4, 2008 by Tom Thompson
The documentation of the coldfire flash module is very confusing.
It speaks of logical/physical blocks, pages and sectors.
It speaks of a number of different clocks.
There is little explanation as to what is what.

For the clocks part i've worked out this:

void mcf52235_init_flash(void){ // Set CFMCLKD to get a flashCLK between 150 kHz and 200 kHz. // Array damage due to overstress can occur when fCLK is less than 150 kHz.  // Incomplete programming and erasure can occur when fCLK is greater than 200 kHz. // Not so clear in the RefManual, but it works out to be : //  flashCLK = FSYS/2 /(8*MCF_CFM_CFMCLKD_PRDIV8) /(MCF_CFM_CFMCLKD_DIV+1)  // Calculate the divider to get a flashCLK closest to 200kHz (smaller or equal) : if (FSYS > 25600000) {  MCF_CFM_CFMCLKD = MCF_CFM_CFMCLKD_PRDIV8|MCF_CFM_CFMCLKD_DIV((FSYS/2/8/200000)-1); } else {  MCF_CFM_CFMCLKD = MCF_CFM_CFMCLKD_DIV((FSYS/2/200000)-1); } //MCF_CFM_CFMPROT=0;//No sector is protected //MCF_CFM_CFMSACC=0;//Flash sectors are placed in supervisor address space //MCF_CFM_CFMDACC=0; //MCF_CFM_CFMMCR=0x20; MCF_CFM_CFMMCR = 0; —–}


I still have one question :
Since flashCLK seems to be based on the flash bus clock:
Is the FSYS/2 part caused by and thus influenced by the CFMCLKSEL[CLKSEL] bits ?