We are developing a device requiring certification of class B safety controls as per IEC 60730-1, annex H. Application note AN4873 provides a library with pre-certified test code for some aspects of the basic computational environment according to table H.1. Alas, we are targetting an unsupported microcontroller in the Kinetis EA family, specifically the S9KEAZN32ACLC, and so will need to test the code ourselves for our device and adapt or develop some functions internally.
In order to accelerate this effort we would therefore be interested in any documentation and/or tools relating to the test strategy employed in the validation for the other device families. Particularly descriptions of the test methods employed for the register and RAM/data path tests would be valuable to us, as would any tooling such as a instruction set simulator capable of injecting low-level single faults.
Would it be possible for NXP to share any of this information with us?