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MPC5746B AIPS Peripheral Assignment

Question asked by Christopher Holland on Aug 28, 2018
Latest reply on Sep 20, 2018 by David Tosenovjan

I trying to figure out AIPS / PBridge.

 

1. I don't understand the difference between the two types of Register sets?

   A. Peripheral Access Control Register

   B. Off-Platform Peripheral Access Control Register

 

2. In the reference manual, it reads "The peripheral bridge converts the crossbar switch interface to an interface that can
access most of the slave peripherals on this chip." What does it mean by most?

I would like to know what the peripheral control registers were actually mapped to which peripheral.

 

Somebody else had the question, but it's for a different processor

Does anybody know which peripherals are assigned to the AIPSTZx_OPACRy fields? 

 

3. I'm noticing a problem with a specific register. PACRE

reg_value = AIPS_A.PACR[0].R;  /* Works fine */

reg_value= AIPS_A.PACR[1].R;  /* Works fine */

reg_value= AIPS_A.PACR[2].R;  /* Works fine */

reg_value= AIPS_A.PACR[3].R;  /* Works fine */

reg_value = AIPS_A.PACR[4].R;  /* IOVR */

reg_value= AIPS_A.PACR[5].R;  /* Works fine */

reg_value = AIPS_A.PACR[6].R;  /* Works fine */

reg_value = AIPS_A.PACR[7].R;  /* Works fine */

All OPACR[] registers work fine.

 

"If a peripheral is absent, the corresponding PACR field is not implemented. Reads or
writes to the location of an unimplemented PACR register (because all eight of its
peripherals are absent) should be avoided to prevent undesired behavior."

I guess it must be absent?

 

 

Thank you,

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