The datasheet clearly notes on p. 181. that the max. DDR frequency @1200MHz CPU freq. is 800MHz.
According to the Reference Manual, the DDR PLL is completely independent from the other PLLs in the CPU. It can be set to 1050MHz, independently from the SYS/CPU/FMAN frequency, so it is not clear to me why it could/should not be operated at full speed. Is it because of the possibly lower (0V9 instead of 1V0) Vcore? Is the DDR PLL even in the Vcore voltage domain?