Our new design should update P2020's memory from DDR2 to DDR3.
But there is no ddr reset pin of P2020 mmu.
So, how can I deal with the ddr reset logic without CPLD?
Can connect the pin to Power on reset directly?
As DDR3 reset it is possible to use a copy of the reset signal going to the P2020's HRESET input.
I got it.
Thanks a lot.
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