Our new design will update P2020's memmory from DDR2 to DDR3, but there is no DDR reset of P2020 mmu for DDR3.
So, how can I deal with the reset signal without CPLD?
Is it available which being connectted to Hreset directly?
As DDR3 reset it is possible to use a copy of the reset signal going to the P2020's HRESET input.
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