This question may seems trivial, but I just can't find an answer.
In the i.MX7 Dual Applications Processor Reference Manual, "IMX7DRM.pdf" at page 4941 you can see 14.1.4: Clocks and timing.
The Global clock the ADC is receiving is 24MHz. The Manual says, that the adc analogue clock can vary from 300kHz to 6MHz and that the 24MHz clock can be devided by 4, 8, 16, 32, 64 and 128.
My problem is, that 24MHz : 128 = 187.5kHz. How does this work, and why did the manual say 300kHz?
Could someone please explain it to me?