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LPC43S57 : Reset during Sleep Mode do not work

Question asked by julien brissard on Aug 23, 2018
Latest reply on Sep 18, 2018 by julien brissard

Hello,

Reset (Pin \reset) works correctly during execution of my software (without sleep mode).

But if I enter in sleep mode, then reset pin has no effect.

I thought that  nothing could avoid a reset

Somebody has a clue ?

I got lot of trouble with DeepSleep mode, so I am not sur to be in Sleep or Deep Sleep mode.

In which condition  reset pin could be disable, I found nothing in datasheet about that ?

Here after the code that I use to enter in Sleep mode :

    /* Disable ADC Interrupt */
    NVIC_DisableIRQ(ADC1_IRQn);
    NVIC_ClearPendingIRQ(ADC1_IRQn);
    /* Disable de l'IT RIT */
    NVIC_DisableIRQ(RITIMER_IRQn);
    NVIC_ClearPendingIRQ(RITIMER_IRQn);
    /* Disable de l'interruption */
    // TBD NVIC_DisableIRQ(UARTx_IRQn);
    // NVIC_ClearPendingIRQ(UARTx_IRQn);
    /* Disable de l'interruption */
    NVIC_DisableIRQ(I2C0_IRQn);
    NVIC_ClearPendingIRQ(I2C0_IRQn);
    /* Disable de l'interruption */
    NVIC_DisableIRQ(I2C1_IRQn);
    NVIC_ClearPendingIRQ(I2C1_IRQn);
    /* Disable de l'interruption */
    NVIC_DisableIRQ(SCT_IRQn);
    NVIC_ClearPendingIRQ(SCT_IRQn);
    /* Disable de l'interruption CAN*/
    NVIC_DisableIRQ(C_CAN0_IRQn);
    NVIC_ClearPendingIRQ(C_CAN0_IRQn);
    /* Disable watchdog */
    NVIC_DisableIRQ(WWDT_IRQn);
    NVIC_ClearPendingIRQ(WWDT_IRQn);
    /* Stop Tick */
    SysTick->CTRL = 0;

 

    /* Clock management before sleep */
    Chip_SetupIrcClocking();

 

    // Clear all event
    LPC_EVRT->CLR_STAT = 0xFFFFFFFF;

 

    /* Configure wake up signal */
    PMC_Evrt_Configure(EVRT_SRC_WAKEUP0);

 

    Chip_EVRT_ConfigIntSrcActiveType(EVRT_SRC_WAKEUP1, EVRT_SRC_ACTIVE_HIGH_LEVEL);
    Chip_EVRT_ConfigIntSrcActiveType(EVRT_SRC_WAKEUP2, EVRT_SRC_ACTIVE_HIGH_LEVEL);
    Chip_EVRT_ConfigIntSrcActiveType(EVRT_SRC_WAKEUP3, EVRT_SRC_ACTIVE_HIGH_LEVEL);
    Chip_EVRT_ConfigIntSrcActiveType(EVRT_SRC_ATIMER, EVRT_SRC_ACTIVE_HIGH_LEVEL);
    Chip_EVRT_ConfigIntSrcActiveType(EVRT_SRC_RTC, EVRT_SRC_ACTIVE_HIGH_LEVEL);

 

    LPC_EVRT->HILO = 0x237EBFF;
    // Clear all event
    LPC_EVRT->CLR_STAT = 0xFFFFFFFF;

 

    // contournement pb (cf errata sheet)
#define CREG0_008 (0x40043008)

 

    regval = *((unsigned int *) CREG0_008);
    regval |= (1 << 17);
    regval &= ~(1 << 16);
    *((unsigned int *) CREG0_008) = regval;

 

    /* Deep-Sleep Mode*/
    /* Set Deep sleep mode bit in System Control register of M4 core */
    SCB->SCR |= 0x4;
    /* Set power state in PMC */
    Chip_PMC_Sleep();

 

    /* Wait For Interrupt */
    __WFI();

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