Dawei You

How to understand I/O status for 56F827XX at reset

Discussion created by Dawei You Employee on Aug 21, 2018
Latest reply on Aug 23, 2018 by Peter Becher



here are several questions about datasheet

1.From latest DS for 56F827XX, <MC56F827XXDS>, there are some descriptions for I/O during reset.

<Rev. 4, 07/2018> vs <Rev. 3.0, 09/2016 > , update IO status from "input, internal pull-up" to "input" for most GPIO, whether which means the input is tri-state(high impedance)?

2.this adjustment is for new silicon or all old products??

3.I noticed other old 56f825X datasheet also indicate internal-pull up, seems which is a classic design, why this pull-up cancelled? 

4.How about warm reset(watchdog, SW reset), how these warm reset influence  GPIO status during reset?