we use a iMX7-Colibri modul.
Currently we have a SRAM mapped in the external EIM-Bus (0x28000000-0x2FFFFFFF) - CS0 area 128MB.
It works well.
Now we like to split the area in 2 regions with CS0 and CS1 with 2 * 64 MB
CS0 (0x28000000-0x2BFFFFFF) CS1 (0x2C000000-0x2FFFFF)
I used CS0 Registers and values as a template, but I had done something wrong.
If I read from CS1 area I got the data form CS0 area. I guess there is a register value not defined.
Please can you assist me, to find the error.
I can see CS0, WR, OE,.. signals, but no CS1 signal.
I read back the register settings and the values are:
IOMUXC_GPR_GPR1: 4f40202d <-- Change to 2 * 64MB
//CS1_B mux port of EIM
pSW_PADEPDC_DATA15 = (DWORD*)Map_OALPAtoVA(IOMUXC_SW_MUX_CTL_PAD_EPDC_DATA15, 1);
*pSW_PADEPDC_DATA15 = *pSW_PADEPDC_DATA15 | 0x04; //CS1_B mux port of EIM
Can you help me.