I am doing 8 bit SPI DMA transfers with the KL82Z, and my 3rd to last byte fails to clock in properly. The last two bytes are received and match what I am seeing on the MISO line, but the 3rd to last byte is completely missed, resulting in shifted data.
I was using an internal reference clock of 4MHz, with a SPI clock of 1MHz.
I dropped the SPI clock down to 500kHz, and the problem was resolved. Does anyone know why this issue was happening at the higher speed?