The state of PMIC_ON_REQ

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The state of PMIC_ON_REQ

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eishishibusawa
Contributor III

Dear Sir

 

I would like to confirm the state of PMIC_ON_REQ.

Customer will build the Chip reset scheme like Figure 60-1(IMX6SDLRM Rev.4 P5020).

 

The PMIC_ON_REQ will be High("1") when the state of FSM is ON.

Q1.

If VDD_SNVS_IN is still powered but other power supply is cut off, is the PMIC_ON_REQ remaining in the state of 1?

 

Best Regards,

Eishi SHIBUSAWA

 

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igorpadykov
NXP Employee
NXP Employee

Hi Eishi

Q1. If VDD_SNVS_IN is still powered but other power supply is cut off, is the PMIC_ON_REQ remaining in the state of 1?

yes, note PMIC_ON_REQ is powered by VDD_SNVS_IN according to Table 97. 21 x 21 mm Functional Contact Assignments i.MX6SDL Datasheet
http://www.nxp.com/docs/en/data-sheet/IMX6SDLCEC.pdf

Best regards
igor
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