Can IMX6Q DDR CLK discontinuity cause EMC (test radiation) issues ?

[tommyduan]

Thanks for your reply! 

We currently test radiation（EMC RE） beyond the specification！I find it DDR CLK Multiple of frequency！before,We use I.mx6dl，We don't find this question.Whether caused by DDR power switch？

[Yuri]

Hello,

  My opinion is, that pauses in i.MX6 DDR clock should not provide significant EMC

issues. What is more reasonable - please try to vary MMDC and DRAM drive strength.

Have a great day,
Yuri

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[tommyduan]

Thanks for you replay!

Because DDR layout refer to your DEMO,so  we can't add other RES/FB in clk;Previously we used 6DL is OK,DDR CLK is 400MHZ;Can the clock be changed to 400MHZ for I.MX6Q,How can we  try to vary MMDC and DRAM drive strength.Best to reduce!

[Yuri]

Hello,

Look at section 2.1.3 [SI (Signal Integrity) Consideration] of

Freescale i.MX6 DRAM Port Application Guide-DDR3 

Regards,

Yuri.