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How is MPC8309 SPMR initialised after hardware reset?

Question asked by Ian Willats on Jul 31, 2018
Latest reply on Aug 1, 2018 by Serguei Podiatchev

The MPC8309 Reference Manual (Rev. 2) section 4.5.2.1, System PLL Mode Register (SPMR) states:

It obtains its values according to the reset configuration input signal and
the reset configuration word low loaded during the reset flow. Note that this register is updated only during
a power-on reset sequence and not by a hard reset sequence. It may hold values different than those in the
RCWLR after a a hard reset sequence.

The register is also documented as being read-only.

Please clarify how the register is (re-)initialised after a hardware reset.  Under what circumstances might it have values different to those in the RCWLR, and what is the impact of any such changes?

Thanks,

Ian

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