I am using the Embedded artists LPC4357 board. I configure the system clock to 204MHz and the spifi clock (using the E divider) to 102MHz. When running my code in the debugger, it works just fine. I can read and execute from the SPIFI. However, after performing a board reset or cold boot which loads and runs the code, accessing the SPIFI fails at the point that I set the E divisor to 2 (102MHz). I've checked the datasheet for the qspi on the board (w25q16dv) and it says it's max freq is 104MHz.
If i lower the spifi clock, it starts working again in both use cases mentioned above.
I am using the spifilib v1.14 under lpcxpresso v8.2.2
How can I get the SPIFI to work at 102MHz from cold boot?
Victor,
Thank you for your reply.
I have all 6 pins set to high speed.
I have performed the change from on board flash and sram, Both have the same result.
Regarding "preparing the SPI flash for this clock speed", do you mean setting the QUAD_READ and QUAD_WRITE options on the qspi itself? I am also doing this. Is there something else that needs to be done to "prepare" the qspi? I did not see it in the "links below", although the presentation was quite informative. What am I missing?
Thanks.
Greg
Hello Greg,
I didn't understand the following statement.
I have performed the change from on board flash and sram, Both have the same result.
In the presentation attach to the community post that I put before you can read the following information:
Boot ROM initialize SPIFI clock either 32MHz or 18MHz. If user code needs higher SPIFI, performance, code must re-configure SPIFI, Note that such code must NOT run from SPIFI
When you are making this are you sure you are running from the SRAM?
You mentioned before that if you lower the spifi clock then the program runs as it should. Could you please tell me at which value you are setting the spifi clock?
Regards,
Victor.
Victor,
To clarify the previous statements, when I said that I performed from on board flash and sram I meant that I built my program both ways to see if it would make a difference. I point was that I was not running out of SPIFI.
I resolved this. I had the reset parameter of "spifiInit" function set to false. I figured that the BOOT ROM would have already done this so I didn't need to. Obviously that was not correct. Thanks for your help.
Hello Greg Johnson,
Did you initialize the SPIFI pins to high speed?
Did you prepare the SPI flash for this clock speed?
Did you perform the clock setup change from SRAM or did you bite the hands which feed you?
Also, I recommend you to check the SPIFI presentation of the following link:
Hope it helps!
Victor.
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