When we turn the iMX535 3.2V supply OFF, there is a lingering voltage of ~.8V that remains on this line

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When we turn the iMX535 3.2V supply OFF, there is a lingering voltage of ~.8V that remains on this line

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willallan
Contributor I

We/I power several modules with a 3.2V supply that we can turn OFF when we go into Standby/Sleep Mode.
When we turn the supply OFF, there is a lingering voltage of ~.8V that remains on this line.
We attach this 3.2V Supply onto the following modules……

Name Pad
NVCC_EIM_MAIN U9
NVCC_EIM_MAIN U10
NVCC_EIM_SEC U7
NVCC_SD1 H15
NVCC_SD2 H14
NVCC_DATA N7
NVCC_FEC F11
NVCC_GPIO F8
NVCC_KEYPAD F7
VDD_FUSE G15

My question is….
Could any of these be leaking voltage back onto this supply after we shut the 3.2V supply OFF? (From one of other module supplies or possibly a main core supply rail?)

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igorpadykov
NXP Employee
NXP Employee

Hi will

>>Could any of these be leaking voltage back onto this supply after we shut the 3.2V
>supply OFF? (From one of other module supplies or possibly a main core supply rail?) 

yes there may be leakage from other powered modules, as there is no full isolation between them.

Full isolation has only Low Power SRTC (SRTC LP) submodule by means of isolation cells.

Best regards
igor
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willallan
Contributor I

HI Igor,

You are actually with NXP, Correct? 

And are you part of the support team that services support requests?   Maybe you are the same Igor that has helped me with other requests on via “NXP Support”?

 

Your info is very significant and will go a long way in helping customer resolve this problem.  Is there some documentation that you can point me to in the data sheet/user manual that specifies this so I can point the customer to it?

Are there any possible “work arounds” to this issue other than using the “Low Power SRTC (SRTC LP) submodule” that you mention is the only isolated supply?

Much appreciated?

 

Note that we have Case # “00171876” created for this issue. 

Since the NVCC_GPIO is one of the modules that is powered by the 3.2V it looked like this suggestion from “NXP Support” could be a cause:

2.   According to the i.MX53 Datasheet(s):

" All I/O pins should not be externally driven while the I/O power supply for

the pin (NVCC_xxx) is off. This can cause internal latch-up and malfunctions due to reverse current flows.

Best regards,

Yuri

Technical Support NXP Semiconductor

Thanks!

Willie A.

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igorpadykov
NXP Employee
NXP Employee

Hi Willie

there are no possible “work arounds” from i.MX side as there is no
full isolation of modules inside processor (except SRTC LP).
In general one can add additional switch for supply (between supply and i.MX),
probably just schottky diode, so it may be turned off and there would not be
lingering voltage of ~.8V. Yes I am answering support requests too.

Currently this thread is duplication of  case “00171876”,

please proceed with that path (through case support).

Best regards
igor

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