I am using SPI for control of an LCD driver chip which uses the standard CS (chip select) plus D/C (data/command).
I don't see a way to assert multiple PCS lines for a frame in the FIFO. Asserting the D/C via GPIO works, but doesn't allow full performance using the FIFO, because the FIFO timing is async from the GPIO.
Any ideas on this? This was a feature of the Kinetis chip I used previously.