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Updating C0V with CLKS[1:0] != 0, FTMEN=1 and EPWM

Question asked by Xaro Wubas on Jul 20, 2018
Latest reply on Jul 25, 2018 by Robin_Shen

Reference manual: K60P144M100SF2V2RM


All I want to do is update C0V in EPWM with FTMEN=1 when the FTM clock is already started. AFAIK all writes are buffered, so I have to force the written value to be applied anyhow. However, all of the options mentioned in the reference seem to exclude each other:


1. "If the selected mode is not output compare and (SYNCEN = 1) then CnV register is updated by the C(n)V and C(n+1)V register synchronization."

"C(n)V and C(n+1)V register synchronization." is linked to PWM synchronization, which says:

"The PWM synchronization must be used only in Combine mode. "


2. From my understanding PWMLOAD is not usable if you configured edge PWM, because it is limited to combine mode, right?


So, what is about the remaining cases, e.g., EPWM and SYNCEN=0?