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e5500

Question asked by H VO on Jul 17, 2018
Latest reply on Jul 18, 2018 by ufedor

In the e5500 core reference manual, rev. 4:

 

in Section 5.4.4  L1 Cache Error Detection and Correction:

 

L1 cache error detection occurs whenever:

   A load instruction hits in the L1 data cache

   An instruction fetch hits in the L1 instruction cache

   A line is cast out of the L1 data cache

 

why would "An instruction fetch hits in the L1 instruction cache" result in error?

 

Thanks!

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