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MMA8451 Interrupts and Reset Behavior?

Question asked by Ian Hayles on Jul 17, 2018
Latest reply on Jul 18, 2018 by Tomas Vaverka

I have some questions about the MMA8451 interrupt architecture and software reset (RST bit) behavior:

(1) Is the RST bit self-clearing?  The datasheet mentions a boot process - is this just the initial power on boot?  

(2) What is the timing regarding RST?  Specifically - is there a coming-out-of reset delay?  Can the part be used immediately after coming out of reset (i.e. streamed I2C communication that takes it out of reset won't miss the next byte)

 

Regarding interrupts - does going into standby (SYSMOD = 0) clear an active interrupt?  

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