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FlexSPI read by AHB RX buff on the MIMXRT1050-EVK

Question asked by 江昆哲 chiang on Jul 15, 2018
Latest reply on Jul 31, 2018 by Artur Petukhov

Dear Sir.

    Good day!

    I am using the FlexSPI interface to read Flash on MIMXRT1050-EVK.

    But "Software triggered Flash read/write access by IP Bus", that have read latency.

    However, I have read Chapter 30 of the "i.MX RT1050 Processor Reference Manual".

    That have described  "Memory mapped read/write access by AHB Bus". (AHB RX Buffer implemented to reduce read latency.)

    However, I can't understand the description of the "i.MX RT1050 Processor Reference Manual", and there is no such example in the standard SDK.

    So can I download the relevant sample code in NXP web-site ? 

    Or is there a more detailed description of the AHB RX Buffer document?