I am using the FlexSPI interface to read Flash on MIMXRT1050-EVK.
But "Software triggered Flash read/write access by IP Bus", that have read latency.
However, I have read Chapter 30 of the "i.MX RT1050 Processor Reference Manual".
That have described "Memory mapped read/write access by AHB Bus". (AHB RX Buffer implemented to reduce read latency.)
However, I can't understand the description of the "i.MX RT1050 Processor Reference Manual", and there is no such example in the standard SDK.
So can I download the relevant sample code in NXP web-site ?
Or is there a more detailed description of the AHB RX Buffer document?