In the K22P144M120SF5V2RM.pdf file on Kinetis K22 Sub-Family Reference Manual, the
FTM channel control register, FTMx_CnSC, has two bits, CHIE and DMA, section 38.3.6.
CHIE - 1 Enables channel interrupts
DMA - 1 Enable DMA transfer
It appears to enable a DMA transfer from an FTM channel event, both the CHIE and DMA bits must be be on.
The documentation does not make this clear.
Is this a property of all peripherals or just the FTM?