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AIPS & MPU in MPC5777C

Question asked by DSPIC MIC on Jul 11, 2018
Latest reply on Jul 30, 2018 by Etienne Alepins

Hi All,

I have two application APP_0(TRUSTED) and APP_1(NON_TRUSTED).

I have configured APP_0 as trusted application and given access to all memory area.
and configure memory block as given manner:
/* Internal RAM (XBAR Slave Port 2 (192KB) )*/
MPU0.RGD[0].WORD0.R = 0x40010000; /* Start address */
MPU0.RGD[0].WORD1.R = 0x4003FFFF; /* End address */
MPU0.RGD[0].WORD2.R = 0x0000003F; /* Read-write-execute allowed for all master */
MPU0.RGD[0].WORD3.R = 0xFF000001; /* Mark descriptor as valid */

 

/* Peripheral Bridge A Registers */
MPU0.RGD[1].WORD0.R = 0xC3E00000; /* Start address */
MPU0.RGD[1].WORD1.R = 0xFFDFFFFF; /* End address */
MPU0.RGD[1].WORD2.R = 0x0000003F; /* Read-write-execute allowed for all master */
MPU0.RGD[1].WORD3.R = 0xFF000001; /* Mark descriptor as valid */

 

/* Peripheral Bridge B Registers */
MPU1.RGD[0].WORD0.R = 0xFFE00000; /* Start address */
MPU1.RGD[0].WORD1.R = 0xFFFFFFFF; /* End address */
MPU1.RGD[0].WORD2.R = 0x0000003F; /* Read-write-execute allowed for all master */
MPU1.RGD[0].WORD3.R = 0xFF000001; /* Mark descriptor as valid */

 

/* For STACK (XBAR Slave Port 4 (256 KB)) )*/
MPU1.RGD[1].WORD0.R = 0x40010000; /* Start address */
MPU1.RGD[1].WORD1.R = 0x4003FFFF; /* End address */
MPU1.RGD[1].WORD2.R = 0x0000003F; /* Read-write-execute allowed for all master */
MPU1.RGD[1].WORD3.R = 0xFF000001; /* Mark descriptor as valid */

 

MPU1.CESR.B.VLD = 1; /* Enable MPU1 */

MPU0.CESR.B.VLD = 1; /* Enable MPU0 */


But, to APP_1(NON_TRUSTED), i have given access of few area of RAM-

/* Internal RAM of (XBAR Slave Port 2 )*/
MPU0.RGD[2].WORD0.R = 0x40010200; /* Start address */
MPU0.RGD[2].WORD1.R = 0x40010300; /* End address */
MPU0.RGD[2].WORD2.R = 0x0000003F; /* Read-write-execute allowed for all master */
MPU0.RGD[2].WORD3.R = 0x01000001; /* Mark descriptor as valid */

and 

/* For STACK of (XBAR Slave Port 4  )*/
MPU1.RGD[2].WORD0.R = 0x40010400; /* Start address */
MPU1.RGD[2].WORD1.R = 0x40000FFF; /* End address */
MPU1.RGD[2].WORD2.R = 0x0000003F; /* Read-write-execute allowed for all master */
MPU1.RGD[2].WORD3.R = 0x01000001; /* Mark descriptor as valid */

 

And no memory block configured for Peripheral area.

But, when APP_1 runs, i want to provide access of Peripheral area, with the help of AIPS.
If this application(APP_1 ) having variable (PHERIPHEARL ACCESS = TURE)

and i want to provide access, with the help of AIPS, what i have configured below:

AIPS0_MPRA = 0x70000000;

AIPS0_MPRB = 0x00000000;

AIPS0_PACRA =0x44444444;

AIPS0_PACRB =0x44000444;

(so for APP_1, i want allow access from Peripheral  XBAR to STM_A only)

but i am getting memory fault when accessing any from  XBAR to STM_A .

 

could you please help me .

 

Thanks!

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