目前硬件支持LVDS显示，由于时钟限制，两路LVDS并一路，通过TI DS947芯片来实现（8路LVDS DATA,1路CLK）。为什么软件中将lvds-channel@1禁止，屏幕还是显示正常？
[Translated by Google]:
Q: At present, the hardware supports LVDS display. Due to the clock limitation, two LVDSs are combined and implemented by TI DS947 chip (8 channels of LVDS DATA, 1 channel of CLK). Why is lvds-channel@1 disabled in the software and the screen still showing normal?
DS947 chip uses 8 channels for even odd lines, so when channel 1 is disabled
image also can be seen, though with less quality.
So what's the correct config for dts ? split mode?
yes it is split mode.
We applied patch for our bsp Patch to support uboot logo keep from uboot to kernel for NXP Linux and Android BSP (HDMI, LCD and LVDS) 0001-Fix-the-split-mode-LVDS-panel-no-TX3-signal-issue.patch L4.1.15_GA1.2.0_uboot_logo_keep_patch_2017-01-06.zip
Once enable LVDS_SPLIT_MODE in mx6sabre_common.h, LCD seems just display half(see below photo), if Disable LVDS_SPLIT_MODE, it seems display OK.
Linux Kernel use [ fsl,data-mapping = "spwg"], it display correct.
image also can be seen, though with less queslity.
Q: when channel 1 is disabled, channel 1 LVDS_DATA still can be transfered to DS947? Which material should i need to read so that can understand this?
probably one can try with sdk baremetal test (one can find zip on link SMP Enable in IMX6 ),
then compare ldb settings with linux/android.
Except Reference Manual there is no additional documentation for that mode.
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