Got following questions from customr Dyson. Can you please help me to answer them?
With regard to PCIe….
- The CLK1_P/N and CLK2_P/N input and output electrical specifications appear to be missing from the EC spec, could you please supply?
- The evaluation boards use CLK1_P/N output for PCI-e clock generation. But the HDG and eval schematics indicate that this clock is not PCIe compliant. In what way is this clock not PCIe compliant, e.g. voltage levels, jitter etc.? How can we determine whether this clock would be good enough to drive our particular device?
- Is there any guidance on termination schemes when using this clock as an input or as an output, for example:
- If the clock source driving the iMX6 input is LVDS, HCSL or HSTL
- If the clock receiver being driven by the iMX6 output is LVDS, HCSL etc