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P2041 hardware bring up issues

Question asked by yan wang on Jul 5, 2018
Latest reply on Jul 10, 2018 by ufedor

I'm debugging  a customer P2041 board.

There're issues in P2041 boot up stage,  following test cases:

 

Test case1: cfg_rcw_src[0:4]配置字 01100 (Nor flash 8bits width), elbc bus output LCLK0 signal at 6.25MHz, elbc cs0 will output four valid chip select signals ( but p2041rdb output eight chip select signals  under this case)

 

Test case2: cfg_rcw_src[0:4]配置字 01101 (Nor flash 16bits width), elbc bus output LCLK0 signal at 6.25MHz, elbc cs0 will output two valid chip select signals ( but p2041rdb output four chip select signals  under this case)

 

Test case3: cfg_rcw_src[0:4]配置字 10000 (hardcode rcw),RESET_REQ_B is always assert high level '1', it seems the cpu is always at reset status.

 

Test case4: cfg_rcw_src[0:4]配置字 00110(SDHC), dessert PORESET_B,  SDHC_CLK and SDHC_CMD will output some signal

 

Can any one give me some suggestion at these conditions?

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