I am struggling to bring up the SDHC on my MK64FN1M0xxx12 board. I have tried to clock the SDHC with both the IRC48M and a 20MHz OSCERCLK.
- When using the IRC48M and setting the SDHC SYSCTL register, the PRSSTAT register reports value 0xff880080 which is: bit 7 (SDOFF), bit 19 (this read-only field is reserved and always has the value of 0?), and bits 23-31 (CMD and all DAT signals). The expected SDSTB bit is never signalled.
- When using a 20MHz OSCERCLK, the SDHC is able to execute SD_GoIdle, but when executing a SD_SendInterfaceCondition or SD_SendApplicationCmd, the IRQSTAT register reports 0x10001 which is: bit 16 (CTOE) and bit 1 (CC). So the command is timing out.
I have attached a project that reproduces condition 1 on a FRDMK64F evaluation board. The project was built with MCUXpresso and SDK 2.4.0. It stops at drivers/fsl_sdhc.c:969 ("Wait until the SD clock is stable"). Note that a clock configuration and pin routing are included in the MK64FN1M0xxx12_Project.mex file.
I would like to know why the SDHC command is timing out even with a dedicated 20MHz clock from OSCERCLK (condition 2).