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Access from untrasted masters for K82

Question asked by Eugene Hiihtaja on Jun 21, 2018
Latest reply on Jun 25, 2018 by Jing Pan

Hi !


I would like to disable accesses from untrusted masters to memory and peripheral area for K82 MCU.

Only Master0 and 1 can have access to enabled areas.


I have configured  MPU Regions in way when memory and peripheral area (0x40000000-0xFFFFFFFF) give acess for Master0 only. In Region0 i have disabled all Masters and only Master1 is remains.


I undestand that if address range is not covered by MPU region, any master can access to it.

Is this true ?


After that I have disabled all other masters  for read/write in AIPSx-MPRA registers for limit access to peripherals.

Does it really need, MPU already covered peripheral area and access from masters disabled there already ?

MPU of K82 covers some or all peripheral area but from documentaion is not so clear what exact address ranges are 

covered by MPU ?


After that I have checked AIPSx-PACRx register and see posibility to disable access from untrasted master on per peripheral level, one by one.

Does it is really need ? Can MPRA or MPU filter all untrasted masters already ?


E.g what minimal setting required for protect all memory and peripheral areas from other masters than 1 &2 ?