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CW10.6.4 DSC compiler issue with saturation?

Question asked by q1444 Employee on Jun 20, 2018
Latest reply on Jul 6, 2018 by ZhangJennie


customer reported a potential issue with the DSC compiler in CW10.6.4:

The problem is that the bit complement of 0x80000000 results in 0x7FFFFFFE on 56F84xxx processors, when saturation is active.

All other values are calculated correctly. For 8 bit and 16 bit values, the processor has dedicated instructions to do respective bit complements, all work OK with active saturation.

For 32 bit values, there isn’t such an instruction, the compiler generates the code according to the formula below:

                                                -x = ~x + 1 => ~x = -x -1

The notation is as follows:

-x denotes the two’s complement of value x

~x denotes the bit complement of value x.


Now, the two’s complement of 0x80000000 is actually on 33 bits representable, like 0x080000000; the ALU sees the overflow and saturates at 0x7FFFFFFF.

If we extract 1 in second step, we get the result 0x7FFFFFFE.


This was surprising and not expected, even if the saturation was active.


More information about the compiler version and a test routine:


typedef long frac32_t;

frac32_t x_invert(frac32_t in)





volatile frac32_t xx_inv;

void APP_Task10ms(void)







Could you please investigate on that?


thanks in advance