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i.MX6 IPU memory map address

Question asked by Michal Vokac on Jun 15, 2018
Latest reply on Jul 12, 2018 by jotes


I would like to ask what are the correct addresses of the IPU block in i.MX6S/DL/Q SoCs.

There is a difference in what the TRM says - System memory map:

Start address | End address | Size | Description

02A0_0000     | 02DF_FFFF | 4 MB | IPU-2

0260_0000     | 029F_FFFF | 4 MB | IPU-1

and what addresses are used in device trees:

                ipu1: ipu@02400000 {
                        #address-cells = <1>;
                        #size-cells = <0>;
                        compatible = "fsl,imx6q-ipu";
                        reg = <0x02400000 0x400000>;


                ipu2: ipu@02800000 {
                        #address-cells = <1>;
                        #size-cells = <0>;
                        compatible = "fsl,imx6q-ipu";
                        reg = <0x02800000 0x400000>;


All other addresses are correct. The ones from TRM match with those from device tree.

Is this a bug in the device trees? Or in the TRM? Or some maggic is happaning in background?