I'm looking at the MCF54450 for a design and wondering ab...

[nspon]

I'm looking at the MCF54450 for a design and wondering about what the minimal DDR2 SDRAM layout looks like. I don't need more than 256Kbyte, but it looks as though using a single DDR2 SDRAM would actually give better performance and similar cost/complexity to a 32-bit wide SRAM on the FlexBus. The caveat here is that the SDRAM seems to require series and parallel termination along with a 0.9V regulator for the parallel terminators. This seems a lot for just one chip that will be right next to the CPU. I see that AN-3522 remarks that "in limited cases, parallel termination may not be needed". Thats nice to know, but a bit vague. So my question is:

Has anyone got an MCF5445x running with a single DDR2 SDRAM chip, and if so, what termination scheme did you use?

Thanks,
Nigel

[ma_ko]

Hello Nigel,
we developed a board with the MCF54450 and only one DDR2 - chip. At present we use serial and parallel termination. Using only the serial termination with the address lines seems to function, what we did not test intensively however. With the data lines the ODT of the DDR2 - chip can be used for paralell termination. Set simply OTD enable to High (1.8 V ). The Coldfire does not support that, but with a single chip one can switch the internal termination simply on manual. Ths should save a little bit of space and money. A 0.9 V regulator will be in any case necessary.

Greeting, Markus

[nspon]

Thanks, thats interesting. So, in summary, you are only using series termination resistors and have ODT pulled high on the single DDR2 chip. That certainly helps with the routing.

Much obliged,
Nigel