We're designing a board using an LPC54608 and a LAN8720 to provide an Ethernet interface. We have an LPCXpresso54608 development board (OM13092) as a reference. We're confused about the connection of the LAN8720's CRS_DV pin. The pin's name is "Carrier Sense/Receive Data Valid". On the development board this pin is connected to the LPC54608's PIO4_10 pin, which is the ENET_RX_DV pin, which is described as "Ethernet receive data valid".
What's confusing is that the PIO2_2 pin is described as "ENET_CRS — Ethernet Carrier Sense (MII interface) or Ethernet Carrier Sense/Data Valid (RMII interface)". PIO5_1 has the same description. Why is the PHY's CRS_DV pin not connected to one of these two pins rather than PIO4_10, which seems to be only half of the multiplexed CRS_DV output from the PHY?
We've looked at the LPC54608's Ethernet registers (section 36.6 of the LPC54608 User Manual), and the only reference to CRS occurs with MII mode. Is CRS ignored if in RMII mode. If so, then should it be connected to a pin that has the "pure" ENET_RX_DV function, such as PIO4_10 or PIO5_0?