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i.MX6D: AR8033 Ethernet PHY register setting

Question asked by Ganesan K on May 29, 2018
Latest reply on Jun 1, 2018 by jimmychan



Our Electrical team wants to change a register setting in AR8033 ethernet PHY in order to pass EMI/EMC Regulatory tests. The change is in PHY control register (section 5.3.7 in page 97 of AR8033 datasheet. Attached) to reduce to voltage from 1.8 v to 1.5v.


The Power-ON default value is 1.5 v but it was changed (highlighted) in the BSP in file arch/arm/mach-imx/mach-imx6q.c (Linux 4.9)


static int ar8031_phy_fixup(struct phy_device *dev)


       u16 val;


       /* Set RGMII IO voltage to 1.8V */

       phy_write(dev, 0x1d, 0x1f);

       phy_write(dev, 0x1e, 0x8);


       /* disable phy AR8031 SmartEEE function. */

       phy_write(dev, 0xd, 0x3);

       phy_write(dev, 0xe, 0x805d);

       phy_write(dev, 0xd, 0x4003);

       val = phy_read(dev, 0xe);

       val &= ~(0x1 << 8);

       phy_write(dev, 0xe, val);


       /* To enable AR8031 output a 125MHz clk from CLK_25M */

       phy_write(dev, 0xd, 0x7);

       phy_write(dev, 0xe, 0x8016);

       phy_write(dev, 0xd, 0x4007);


       val = phy_read(dev, 0xe);

       val &= 0xffe3;

       val |= 0x18;

       phy_write(dev, 0xe, val);


       /* introduce tx clock delay */

       phy_write(dev, 0x1d, 0x5);

       val = phy_read(dev, 0x1e);

       val |= 0x0100;

       phy_write(dev, 0x1e, val);


       return 0;



#define PHY_ID_AR8031  0x004dd074


Question to the team:

I have removed those source code lines to pass the tests but I am interested in knowing why Freescale/NXP set it to 1.8V. Are there any other side effects in leaving it to default value of 1.5v. My electrical team says that Ethernet Eye pattern may have an impact by reducing this voltage. Does anyone have background about this. Any information regarding this would be appreciated. Regulatory tests are passing with good margin by keeping this voltage to 1.5 v but I wanted to ensure that we are not compromising on any other factors.