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MPC5668G DSPI_C only accessible by Core z0; maybe depends on AIPS/AXBS?

Question asked by Tanzou Mechmet on May 25, 2018
Latest reply on May 29, 2018 by Tanzou Mechmet

Hello everybody,

 

at first of all, I'm sorry because of my not very good English!

I'm working on the MPC5668G which has two Cores z0 and z6. I have to use the DSPI module and I can only use the DSPI_C interface. Until now I was using only the z6 Core and while I wanted to implement the code for DSPI_C, I got a DTLB (Data Translation Lookaside Buffer) error on the debugger.

I have tested the other DSPI interfaces (DSPI_A, DSPI_B, DSPI_D) and the other Core z0 and I could determine, that

the Core z6 can successfully access only the DSPI_A and DSPI_B interfaces,

while

the Core z0 can successfully access only the DSPI_C and DSPI_D interfaces.

 

I have looked up to into the Reference Manual (RM) and I have seen one difference:

DSPI_A and DSPI_B are within the memory region AIPS_B (AXBS Port S7)

while

DSPI_C and DSPI_B are within the memory region AIPS_A (AXBS Port S6)

 

So, I think, that the AIPS_A is only accessible by Core z0 and the AIPS_B is only accessible by Core z6. But in the RM I can't see this information. So could you please explain me, if I am right or if it is possible to change configurations?

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