I have some confusing thing. GPDMA transfers and receives some data over SSP0. Everything works perfectly well. No data lost. But sometimes, if there is long processor activity (memset for big data array, or just empty loop to make short delay, not mine, in cmsis library), SSP sets RORRIS flag in RIS (Raw Interrupts Status) register. It means, DMA can't receive data for specific time. I think processor takes all buses, so DMA can't access to them for some period. I read user manual over and over again. I couldn't find any clarification for the question. So, can I say to MCU that he must stop shile DMA does his great work???