LC60: VDD rise rate limitation for proper POR?

[BasePointer]

Hi,

I wonder there is a limitation for VDD rise rate to get proper POR?

I couldn't find any info in the datasheet.

10x

[kef]

VDD rise rate isn't an issue, but POR re-arm voltage level is well below specified VDD min! Of course MCU can't and isn't guaranteed to operate reliably below VDD min (1.8V). LVR circuit solves this issue. That's why you should have internal or some external LVR reset circuit enabled. If LVR circuits eats too much, then you could monitor VDD yourself periodically. Whenever VDD drops close to min 1.8V, you should reenable LVD. How often you should check VDD depends on VDD caps probably - you should provide MCU is always reset below 1.8V.

[BasePointer]

Hi,

This parameter is provided by Microchip for their MCUs. I'm not sure, the BOR or POR architectures of Freescale and Microchip may differ. Why isn't same restriction valid for LC60?

Here is a small spect provided by Microchip:

[bigmac]

Hello BP,

It would seem that, for many of the older HC908 devices, the minimum value for "POR rise time ramp rate" is specified within the datasheet, usually either 20 V/s or 35 V/s.  However, this specification seems to have been omitted within the HCS08 device datasheets.

For the HC908's, there is also a further requirement to which Kef was alluding.

If minimum V DD is not reached before the internal POR reset is released, the LVI will hold the part in reset until minimum Vdd is reached.

For the 'LC60 device, low voltage reset is enabled on occurrence of POR.  Just in case a voltage dip is not sufficient to cause POR, leaving LVI reset enabled should give better reliability for these circumstances.

Regards,

Mac