i.MX8MQ EVK Configure Clock Frequency and Configure PLL

[xinwang_23]

How to configure clock frequency (NOC, AXI, AHB, CPU, DDRC) and configure PLL (ARM_A53_CLK, NOC_CLK, MAIN_AXI_CLK...)

[igorpadykov]

Hi XIN

clocks are described in sect.5.1 Clock Control Module (CCM) i.MX8MDQ Reference Manual
https://www.nxp.com/docs/en/reference-manual/IMX8MDQLQRM.pdf

in uboot sources one can look at

imx-common\arm\arch - uboot-imx - i.MX U-Boot 

imx8m_evk.c\imx8mq_evk\freescale\board - uboot-imx - i.MX U-Boot 

in linux one needs to follow clock framework rules:
https://www.kernel.org/doc/Documentation/clk.txt 
https://elinux.org/images/b/b8/Elc2013_Clement.pdf 

clk-imx8mq.c\imx\clk\drivers - linux-imx - i.MX Linux kernel 

fsl-imx8mq-evk.dts\freescale\dts\boot\arm64\arch - linux-imx - i.MX Linux kernel 

use attached Porting Guide.

Best regards
igor
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[xinwang_23]

Thank you very much for your answer,

but there are several points to be confirmed. I hope you can answer it.

1. NOC，AXI，AHB clock configuration

The document [i.MX 8M Quad Power Consumption Measurement]  6.2.1 IDLE_DDRC_25MHz

NOC，AXI，AHB clock configuration, call clk_set_rate function can be set?

For example: clk_set_rate (clks[IMX8MQ_NOC_CLK_DIV], 8000000000)

2. CPU Clock Configure

Use this command,Is it possible to meet the needs in 6.2.1.1 clock configuration

→　echo 1000000 > /sys/devices/system/cpu/cpu0/cpufreq/scaling_setspeed

3. DDRC Clock Configure

The ddrc clock frequency is 800MHz by default，If the ddrc clock is set to 25MHz

use this command?

→　echo mem > /sys/power/state

If use this command, all clocks and PLL turned off，NOC, AXI，AHB... will also be closed

Doing so does not satisfy the requirements in the table, right?，

How should the ddrc clock frequency be set?

4. PLL configuration

According to the “6.2.1.1 clock configuration” table below, how to set the PLL?

[igorpadykov]

suggest to create new threads for new questions.

~igor