I've read the Reference Manual description of the CAN_RXFGMASK register, but I don't understand it. I find the PPC register bits always being number backwards compared to normal confusing which then leads on to not understanding how to programme this register.
I've looked at the example code for a few processors, but they unhelpfully set wide open masks and receive identifier zero. It would be far more helpful if those piece of code used a non-zero message identifier and did programme some masks.
So.. this register's bits are numbered 0-31 for msb-lsb. I'm going to be using format 'A' with a single mask. The description table in section 47.4.17 lists:
RTR = FGM <--- is this the msb or lsb ?
IDE = FGM
RXIDA = FGM[29:1] <-- is this really 1:29 to match with the 'backwards' numbering or 29:1 to match normal numbering ?
Reserved = FGM <-- is this the msb or lsb ?
It would be far more helpful (to me) to show the three Filter Table Elements Formats as three variants of the register description instead of using the table due to the ambiguity about bit numbering.