Hi,
I have the following use case:
After triggering NCF44 the FCCU shall switch a user defined PIN (via SMC - Safe Mode Control - bit of SIUL2).
Needed FCCU state transition: Normal -> Alarm -> Fault
NORMAL to ALARM: Fault is enabled and alarm timeout is enabled
ALARM to FAULT: fault is not recovered on time
Problem:
After triggering the external PIN I get an IRQ that means, the ISR function will be called. Short time later the ISR function of FCCU Alarm will also be called.
What is about the clearing of alarm IRQ flag? As I understand the IRQ flag will be cleared if either the error is not more present or if the FCCU is in fault state. Is my understanding correct?
FCCU_IRQ_SAT = 0x2 that means ALRM_STAT bit is set with other words the ISR function is called.
So, according to the FCCU module description to get FCCU from ALARM state into FAULT the fault should not be "cleared" on time. If the FCCU is in ALARM state, a timeout counter will be started by FCCU.
My alarm ISR function will be called periodically but the state of FCCU is NORMAL (FCU_STAT[STATUS]).
Do you have any idea what is the reason for it?
"NOTE
If you enable a noncritical fault channel but disable all
reactions for that channel, FCCU changes state if necessary
but doesn’t perform any reaction because reactions are
disabled. If you enable reactions for a noncritical fault
channel but disable that channel, and FCCU is in Normal
state when a fault occurs on the channel, FCCU doesn’t
enter Alarm or Fault state and therefore doesn’t perform
any reaction."
In my case reaction is ALARM IRQ and channel is 44.
FCCU configuration:
/**********************************************************************************/
/* At this point FCCU is in config state*/
/**********************************************************************************/
/* Configure test 0 */
SetBitField(FCCU, CFG, CFG_FOM, 5);
/*
* 00 Controlled by the FSM
* 01 Always low
* 10 Controlled by the FSM
* 11 High until a fault occurs on a channel, regardless of whether that fault is disabled; thereafter,
* controlled by the FSM. Note: FCCU ignores an attempt to write this value if the fault-output (EOUT)
* timer is already running.
* */
SetBitField(FCCU, CFG, CFG_FCCU_SET_CLEAR, 10);
/* Glitch filter needs to be bypassed by setting FCCU_CTRL[FILTER_BYPASS] before enabling NCF[44]. */
SetBit(FCCU, CTRL, CTRL_FILTER_BYPASS);
/* FCCU moves into the ALARM state if the respective fault is enabled */
FCCU.NCF_TOE[0] = 0;
FCCU.NCF_TOE[1] = 0xFFFFFFFF;
FCCU.NCF_TOE[2] = 0;
FCCU.NCF_TOE[3] = 0;
/* Enable fault channel: #44 */
FCCU.NCF_E[0] = 0;
FCCU.NCF_E[1] = 0xFFFFFFFF;
FCCU.NCF_E[2] = 0;
FCCU.NCF_E[3] = 0;
FCCU.NCF_CFG[0] = 0;
FCCU.NCF_CFG[1] = 0xFFFFFFFF;
FCCU.NCF_CFG[2] = 0;
FCCU.NCF_CFG[3] = 0;
/*
* Enable at least one type of Fault-state reaction for the channel:
* - chip reset (NCFSCx),
*/
FCCU.NCFS_CFG[0] = 0;
FCCU.NCFS_CFG[1] = 0;
FCCU.NCFS_CFG[2] = 0;
FCCU.NCFS_CFG[3] = 0;
FCCU.NCFS_CFG[4] = 0;
FCCU.NCFS_CFG[5] = 0;
FCCU.NCFS_CFG[6] = 0;
FCCU.NCFS_CFG[7] = 0;
FCCU.IRQ_ALARM_EN[0] = 0;
FCCU.IRQ_ALARM_EN[1] = 0xFFFFFFFF;
FCCU.IRQ_ALARM_EN[2] = 0;
FCCU.IRQ_ALARM_EN[3] = 0;
/* Error reaction configuration - Enable alarm reaction */
FCCU.NMI_EN[0] = 0;
FCCU.NMI_EN[1] = 0xFFFFFFFF;
FCCU.NMI_EN[2] = 0;
FCCU.NMI_EN[3] = 0;
FCCU.NCF_TO = 0x30u;
FCCU.DELTA_T = 0b1111111111110;
