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DDR3 - What are good delay windows?

Question asked by Torben Klein on May 16, 2018
Latest reply on May 17, 2018 by igorpadykov



after using the DDR Stress Tester to get calibration values for DDR3 according to "Freescale i.MX6 Port Application Guide - DDR3" I am wondering how to judge the resulting delay windows. In the document it says on freescale evaluation boards the window for DQS gating is 1.1 to 1.2 tCK and for read write delay it is 0.3 to 0 4 tCK. So this are good, acceptable values? I have nothing to compare it to. What windows are you getting on your designs?